Ab initio perspective of ultra-scaled CMOS from 2D-material fundamentals to dynamically doped transistors

نویسندگان

چکیده

Abstract Using accurate dissipative DFT-NEGF atomistic-simulation techniques within the Wannier-Function formalism, we give a fresh look at possibility of sub-10-nm scaling for high-performance complementary metal oxide semiconductor (CMOS) applications. We show that combination good electrostatic control together with high mobility is paramount to meet stringent roadmap targets. Such requirements typically play against each other gate length MOS transistors made conventional materials like Si, Ge, or III–V and dimensional expected end ~12 nm gate-length (pitch 40 nm). demonstrate using alternative 2D channel materials, such as less-explored HfS 2 ZrS , high-drive current down ~6 is, however, achievable. also propose dynamically doped field-effect transistor concept, scales better than its MOSFET counterpart. Used in high-mobility material it allows keeping CMOS on competitive energy-delay performance, when virtually 0 single-gate architecture an ultra-compact design 22 The further addresses grand-challenge doping ultra-scaled devices particular.

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ژورنال

عنوان ژورنال: npj 2D materials and applications

سال: 2021

ISSN: ['2397-7132']

DOI: https://doi.org/10.1038/s41699-020-00181-1